mirror of
https://github.com/vee1e/tflite-micro.git
synced 2026-09-01 17:57:27 +00:00
ef382bdaae
* Sync files related to Reverse_V2 from TFLite #3110 * PRelu Int16x8 support in RefC * Fix code style in prelu_test.cc * 1. Reverted the copyright year * Resolved compilation error for Int8x8 test case * Add Dynamic_Update_Slice support to TFLM * Code style error correction * Code style correction * Replaced hard coded MaxDimensions to RuntimeShape::kMaxSmallSize * 1. Added more test cases \n2.Removed unused code * Updates for test failure on ARM * Code style updates * Updates on test case failure for ARM * Updates on test case failure for ARM * Code style updates * Add Reduce_All reference operator support to TFLM * Resolving HiFi build errors --------- Co-authored-by: Esun Kim <veblush@google.com>
163 lines
6.4 KiB
C++
163 lines
6.4 KiB
C++
/* Copyright 2025 The TensorFlow Authors. All Rights Reserved.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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==============================================================================*/
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#ifndef TENSORFLOW_LITE_MICRO_KERNELS_MICRO_OPS_H_
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#define TENSORFLOW_LITE_MICRO_KERNELS_MICRO_OPS_H_
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#include "signal/micro/kernels/irfft.h"
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#include "signal/micro/kernels/rfft.h"
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#include "tensorflow/lite/c/common.h"
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// Forward declaration of all micro op kernel registration methods. These
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// registrations are included with the standard `BuiltinOpResolver`.
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//
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// This header is particularly useful in cases where only a subset of ops are
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// needed. In such cases, the client can selectively add only the registrations
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// their model requires, using a custom `(Micro)MutableOpResolver`. Selective
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// registration in turn allows the linker to strip unused kernels.
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namespace tflite {
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// TFLM is incrementally moving towards a flat tflite namespace
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// (https://abseil.io/tips/130). Any new ops (or cleanup of existing ops should
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// have their Register function declarations in the tflite namespace.
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TFLMRegistration Register_ABS();
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TFLMRegistration Register_ADD();
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TFLMRegistration Register_ADD_N();
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TFLMRegistration Register_ARG_MAX();
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TFLMRegistration Register_ARG_MIN();
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TFLMRegistration Register_ASSIGN_VARIABLE();
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TFLMRegistration Register_AVERAGE_POOL_2D();
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TFLMRegistration Register_BATCH_MATMUL();
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TFLMRegistration Register_BATCH_TO_SPACE_ND();
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TFLMRegistration Register_BROADCAST_ARGS();
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TFLMRegistration Register_BROADCAST_TO();
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TFLMRegistration Register_CALL_ONCE();
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TFLMRegistration Register_CAST();
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TFLMRegistration Register_CEIL();
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// TODO(b/160234179): Change custom OPs to also return by value.
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TFLMRegistration* Register_CIRCULAR_BUFFER();
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TFLMRegistration Register_CONCATENATION();
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TFLMRegistration Register_CONV_2D();
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TFLMRegistration Register_COS();
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TFLMRegistration Register_CUMSUM();
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TFLMRegistration Register_DECODE();
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TFLMRegistration Register_DEPTH_TO_SPACE();
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TFLMRegistration Register_DEPTHWISE_CONV_2D();
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TFLMRegistration Register_DEQUANTIZE();
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TFLMRegistration Register_DIV();
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TFLMRegistration Register_DYNAMIC_UPDATE_SLICE();
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TFLMRegistration Register_ELU();
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TFLMRegistration Register_EMBEDDING_LOOKUP();
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TFLMRegistration Register_EQUAL();
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TFLMRegistration* Register_ETHOSU();
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TFLMRegistration Register_EXP();
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TFLMRegistration Register_EXPAND_DIMS();
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TFLMRegistration Register_FILL();
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TFLMRegistration Register_FLOOR();
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TFLMRegistration Register_FLOOR_DIV();
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TFLMRegistration Register_FLOOR_MOD();
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TFLMRegistration Register_FULLY_CONNECTED();
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TFLMRegistration Register_GATHER();
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TFLMRegistration Register_GATHER_ND();
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TFLMRegistration Register_GREATER();
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TFLMRegistration Register_GREATER_EQUAL();
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TFLMRegistration Register_HARD_SWISH();
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TFLMRegistration Register_IF();
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TFLMRegistration Register_L2_NORMALIZATION();
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TFLMRegistration Register_L2_POOL_2D();
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TFLMRegistration Register_LEAKY_RELU();
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TFLMRegistration Register_LESS();
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TFLMRegistration Register_LESS_EQUAL();
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TFLMRegistration Register_LOG();
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TFLMRegistration Register_LOG_SOFTMAX();
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TFLMRegistration Register_LOGICAL_AND();
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TFLMRegistration Register_LOGICAL_NOT();
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TFLMRegistration Register_LOGICAL_OR();
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TFLMRegistration Register_LOGISTIC();
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TFLMRegistration Register_MAX_POOL_2D();
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TFLMRegistration Register_MAXIMUM();
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TFLMRegistration Register_MEAN();
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TFLMRegistration Register_MINIMUM();
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TFLMRegistration Register_MIRROR_PAD();
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TFLMRegistration Register_MUL();
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TFLMRegistration Register_NEG();
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TFLMRegistration Register_NOT_EQUAL();
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TFLMRegistration Register_PACK();
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TFLMRegistration Register_PAD();
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TFLMRegistration Register_PADV2();
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TFLMRegistration Register_PRELU();
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TFLMRegistration Register_QUANTIZE();
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TFLMRegistration Register_READ_VARIABLE();
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TFLMRegistration Register_REDUCE_ALL();
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TFLMRegistration Register_REDUCE_MAX();
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TFLMRegistration Register_REDUCE_MIN();
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TFLMRegistration Register_RELU();
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TFLMRegistration Register_RELU6();
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TFLMRegistration Register_RESHAPE();
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TFLMRegistration Register_RESIZE_BILINEAR();
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TFLMRegistration Register_RESIZE_NEAREST_NEIGHBOR();
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TFLMRegistration Register_REVERSE_V2();
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TFLMRegistration Register_ROUND();
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TFLMRegistration Register_RSQRT();
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TFLMRegistration Register_SELECT_V2();
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TFLMRegistration Register_SHAPE();
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TFLMRegistration Register_SIN();
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TFLMRegistration Register_SLICE();
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TFLMRegistration Register_SOFTMAX();
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TFLMRegistration Register_SPACE_TO_BATCH_ND();
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TFLMRegistration Register_SPACE_TO_DEPTH();
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TFLMRegistration Register_SPLIT();
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TFLMRegistration Register_SPLIT_V();
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TFLMRegistration Register_SQRT();
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TFLMRegistration Register_SQUARE();
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TFLMRegistration Register_SQUARED_DIFFERENCE();
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TFLMRegistration Register_SQUEEZE();
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TFLMRegistration Register_STRIDED_SLICE();
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TFLMRegistration Register_SUB();
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TFLMRegistration Register_SUM();
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TFLMRegistration Register_SVDF();
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TFLMRegistration Register_TANH();
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TFLMRegistration Register_TRANSPOSE();
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TFLMRegistration Register_TRANSPOSE_CONV();
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// TODO(b/230666079): resolve conflict with xtensa implementation
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TFLMRegistration Register_UNIDIRECTIONAL_SEQUENCE_LSTM();
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TFLMRegistration Register_UNPACK();
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TFLMRegistration Register_VAR_HANDLE();
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TFLMRegistration Register_WHILE();
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TFLMRegistration Register_ZEROS_LIKE();
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// TODO(b/295174388): Add the rest of inference only registration functions.
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TFLMInferenceRegistration RegisterInference_FULLY_CONNECTED();
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// TODO(b/160234179): Change custom OPs to also return by value.
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namespace tflm_signal {
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TFLMRegistration* Register_DELAY();
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TFLMRegistration* Register_FFT_AUTO_SCALE();
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TFLMRegistration* Register_FILTER_BANK();
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TFLMRegistration* Register_FILTER_BANK_LOG();
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TFLMRegistration* Register_FILTER_BANK_SPECTRAL_SUBTRACTION();
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TFLMRegistration* Register_FILTER_BANK_SQUARE_ROOT();
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TFLMRegistration* Register_ENERGY();
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TFLMRegistration* Register_FRAMER();
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TFLMRegistration* Register_OVERLAP_ADD();
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TFLMRegistration* Register_PCAN();
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TFLMRegistration* Register_STACKER();
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TFLMRegistration* Register_WINDOW();
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} // namespace tflm_signal
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} // namespace tflite
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#endif // TENSORFLOW_LITE_MICRO_KERNELS_MICRO_OPS_H_
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