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WORKSPACE

TensorFlow Lite for Microcontrollers

TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.

Additional Links:

Build Status

Official Builds

Build Type Status
CI (Linux) CI
Code Sync Sync from Upstream TF

Community Supported TFLM Examples

This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.

Platform Status
Arduino Arduino Antmicro
ESP32 ESP32
Sparkfun Edge Sparkfun Edge

Community Supported Kernels and Unit Tests

This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.

Build Type Status
Cortex-M Cortex-M
Hexagon Hexagon
RISC-V RISC-V
Xtensa Xtensa Xtensa

Contributing

See our contribution documentation.

Getting Help

A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.

The following resources may also be useful:

  1. SIG Micro email group and monthly meetings.

  2. SIG Micro gitter chat room.

  3. For questions that are not specific to inference with TFLM (for example model conversion and quantization) please use the following resources:

Additional Documentation

RFCs

  1. Pre-allocated tensors
  2. TensorFlow Lite for Microcontrollers Port of 16x8 Quantized Operators