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load()s are being added in preparation for changes being made to Blaze/Bazel (#2160) 
`load()`s are being added in preparation for changes being made to Blaze/Bazel !

corresponding [google3 cl](https://critique.corp.google.com/cl/553849494)

BUG=[b/295216390](https://b.corp.google.com/issues/295216390)
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.github Add RISC-V as a requirement for the issue on error. (#2128) 2023-07-14 15:36:26 -07:00
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docs Change comment to refer to 3.11 instead of 3.9 (#2029) 2023-06-08 18:11:59 +00:00
python load()s are being added in preparation for changes being made to Blaze/Bazel (#2160) 2023-08-10 03:30:46 +00:00
signal Python extensions for filter bank and stacker Signal Ops. (#2143) 2023-07-25 15:11:22 +00:00
tensorflow load()s are being added in preparation for changes being made to Blaze/Bazel (#2160) 2023-08-10 03:30:46 +00:00
third_party Explicit load for py_library. (#2127) 2023-07-14 21:59:36 +00:00
.bazelrc build(bazel): treat compiler warnings as errors by default (#2065) 2023-06-16 19:30:06 +00:00
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CODEOWNERS Add rascani@ as CODEOWNER for ci and .github directories. (#2042) 2023-06-12 20:19:54 +00:00
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README.md

TensorFlow Lite for Microcontrollers

TensorFlow Lite for Microcontrollers is a port of TensorFlow Lite designed to run machine learning models on DSPs, microcontrollers and other devices with limited memory.

Additional Links:

Build Status

Official Builds

Build Type Status
CI (Linux) CI
Code Sync Sync from Upstream TF

Community Supported TFLM Examples

This table captures platforms that TFLM has been ported to. Please see New Platform Support for additional documentation.

Platform Status
Arduino Arduino Antmicro
Coral Dev Board Micro TFLM + EdgeTPU Examples for Coral Dev Board Micro
Espressif Systems Dev Boards ESP Dev Boards
Renesas Boards TFLM Examples for Renesas Boards
Silicon Labs Dev Kits TFLM Examples for Silicon Labs Dev Kits
Sparkfun Edge Sparkfun Edge
Texas Instruments Dev Boards Texas Instruments Dev Boards

Community Supported Kernels and Unit Tests

This is a list of targets that have optimized kernel implementations and/or run the TFLM unit tests using software emulation or instruction set simulators.

Build Type Status
Cortex-M Cortex-M
Hexagon Hexagon
RISC-V RISC-V
Xtensa Xtensa
Generate Integration Test Generate Integration Test

Contributing

See our contribution documentation.

Getting Help

A Github issue should be the primary method of getting in touch with the TensorFlow Lite Micro (TFLM) team.

The following resources may also be useful:

  1. SIG Micro email group and monthly meetings.

  2. SIG Micro gitter chat room.

  3. For questions that are not specific to TFLM, please consult the broader TensorFlow project, e.g.:

Additional Documentation

RFCs

  1. Pre-allocated tensors
  2. TensorFlow Lite for Microcontrollers Port of 16x8 Quantized Operators